We are looking for an experienced engineer to join a global technology organization developing advanced computing and semiconductor platforms. The role offers hands-on ownership, deep technical challenges and close collaboration across engineering disciplines. Key Responsibilities • Own physical implementation activities across the RTL-to-GDS flow. • Work on floorplanning, synthesis, clock-tree synthesis, place and route, static timing analysis, power/noise analysis, physical verification and equivalence checks. • Drive backend convergence, timing constraints and PPA optimization for macros and clusters. • Contribute to implementation flows and sign-off methodologies using leading EDA tools. Basic Qualifications • Strong understanding of the complete physical design flow from RTL to GDS. • Deep knowledge of timing sign-off and physical verification. • Experience with advanced process nodes and implementation tools. • Strong process orientation with leadership and mentoring capabilities.
cv+6784@hrhome.co.il