Senior FPGA Engineer

Required Qualifications:

• Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related technical discipline.
• Experience: 5 years of professional experience in FPGA design and development.
• HDL Proficiency: Strong proficiency in VHDL and/or Verilog for RTL design.
• Tool Expertise: Demonstrated experience with at least one major FPGA vendor toolchain: Xilinx/AMD (Vivado, Vitis, ISE), Intel/Altera (Quartus Prime,

Platform Designer (Qsys)).

• Simulation Skills: Experience developing structured testbenches; familiarity with simulation tools such as ModelSim and Questa.
• Timing Analysis: Solid understanding of static timing analysis (STA), timing constraints (SDC/XDC), clock domain crossings (CDC), and timing closure techniques.
• Digital Design Fundamentals: Strong foundation in digital logic design, FSM design, pipelining, DSP architectures, and FPGA resource optimization.
• Debug Skills: Proficiency with embedded FPGA debug tools (ILA/ChipScope, SignalTap) and lab equipment.
• Scripting & Automation: Exposure to scripting languages (Python, Tcl, Bash) for automation of design flows, testing, and build processes.
• Ability to manage multiple tasks and meet deadlines in a fast-paced, dynamic environment.
• Passion for continuous learning and staying at the forefront of FPGA technology and AI based development.