ASIC Design Verification Engineer (6080)

As an RTL Verification Engineer, you will be responsible for complex logical units of a new, cutting-edge application processor, working closely with architecture, design, modeling, software, validation, and implementation teams to meet all functional requirements, including performance, power, and area (PPA) goals. An ideal candidate will have at least 3 years of experience in one or more of the following: CPU, architecture, microcontrollers, and memory or cache controller design verification.

Responsibilities: Understand high-level specifications and detailed requirements for application processor design logical units. Verification from plan to execution, build and own all functional verification stages of a unit within application processor. Collaborate with cross functional teams such as architecture, design, and software teams on test plan development. Deliver on time with tight schedule entire verification suite including full functional and code coverage closure before tape-out.

Requirements: BSc. in Electrical and/or Computer Engineering At least 8 years of experience with RTL ASIC verification Knowledge and experience in one of the following: CPU, RISC-V architecture, micro-controllers, memory and cache controllers is an advantage Experience with Verilog, System Verilog Experience with C/C++ (DPI-C) Experience with SVA Experience with UVM methodology is an advantage Able to express complex concepts in fluent technical English

cv+6080@hrhome.co.il